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  unisonic technologies co., ltd LC1126 preliminar y linear int e grate d circuit w w w . u n i s o n i c . c o m . t w 1 of 6 copyright ? 2013 unisonic technologies co., ltd qw-r102-050.a ultra low output voltage linear n-fet controller ? descripti on t he u t c l c 1126 is an ultra lo w output v o l t age l i ne ar n-f e t controll er d e signe d to p r ovide w e ll suppl y volta g e for front-side-b u s terminati on o n mot herb oards and nb ap plic ations . t he u t c l c 1126 integr ates man y functi ons . a po w e r-on- reset (por) circuit monitors su ppl y vo ltag es to preve n t w r on g oper ations. a pok indicat e s the out put st atus w i th time dela y w h ich is set i n terna l l y . it can control oth e r converter for po w e r sequ ence. it can avail a b l e for sc-59-6 packa ge. t h e ut c l c 1126 can be e n able d b y oth e r po w e r s y stem . a 0.5v referenc e voltage w i th 2% accurac y prov idi n g tight regul atio n of th e outp u t volta g e , ena bl e contr o l, op en drai n po w e r goo d sign al, un der-volta ge pr o t ection an d soft start. ? features * mlcc and p o scap stable * 0.5v2 % ref e renc e voltag e * internal soft-start * enab le contr o l * f a st transient respons e * und e r-volta g e short circuit p r otection * po w e r ok ou tput w i t h a del a y time * adjusta b le o u t put voltage do w n to 0.5v * drive n-c han nel mosf et s sot-26 4 5 3 2 1 6 ? or de r i ng i n form at i o n ordering n u m ber package packing lea d free halogen free lc11 26l-ag6-r LC1126g-ag6-r sot-26 tape reel lc1 126l-ag6 - r (1)pac king typ e (2)package type (3)halogen free (1) r : t ape reel (2) a g 6: sot- 26 (3) l: lead free, g: halogen free http://
LC1126 preliminar y linear int e grate d circuit unisonic technologi es co., ltd 2 of 6 w w w . uniso nic.co m.t w q w - r 1 0 2 - 0 5 0 . a ? marking information ? pin confi guration ? p i n de sc ri pt i o n pin no. pin name descript ion 1 v cc input voltage 2 gnd ground 3 pok power ok output pin 4 en h: normal operation, l: shutdown 5 fb feedback pin 6 drv gate drive to n-fet
LC1126 preliminar y linear int e grate d circuit unisonic technologi es co., ltd 3 of 6 w w w . uniso nic.co m.t w q w - r 1 0 2 - 0 5 0 . a ? block diagram gnd en v cc fb dr v pok pok de l a y + - 92 % v ref 0.25 v uv + - + - vref=0.5v error amp po wer-on reset enable thermal sh utdo wn soft-start and control logic
LC1126 preliminar y linear int e grate d circuit unisonic technologi es co., ltd 4 of 6 w w w . uniso nic.co m.t w q w - r 1 0 2 - 0 5 0 . a ? absolute maxi mu m ra ting (t a = 25c, unless other w i s e spe c ified) parameter symbol ratings unit supply voltage vcc -0.3~7 v drv to gnd -0.3~v cc +0 .3 v power dissipation p d 0.4 w junctio n t e mperature t j -40~ + 125 c operating temperature t opr -40~+85 c storage temperature t stg -65~+150 c note: absolute maximum ratings are those values beyond which the device could be permanently damaged. absolute maximum ratings are stress ratings only and functional device oper ation is not implied. ? electric al ch ara cteri s tic s (v in =1.5v, v sh d n =v in , t a = 25c, c in =c out = 1 f , unless oth e r w ise n o ted.) paramet er symbol t es t conditions min t y p max unit supp l y v o ltag e rang e v cc 4.5 5.5 v input volta ge uvlo t h reshold v uv l o v cc risin g 3.75 v input volta ge uvlo h y st ere s is v hys t v cc f a llin g 0.25 v supply current i cc en=v cc 0.4 0.8 ma shutdo w n curr ent i sd en=0v -1 1 a feedback voltage v fb 0.49 0.5 0.51 v f eedb ack pin input curr ent i fb vf b= 0.5v -100 100 na soft start t i me t s s 1 ms en pin lo gic h i gh t h reshol d voltag e v en h enab le 1.3 v v en l disab le 0.5 v en pin input c u rrent i en i out =0 ma, v in =5v -1 + 1 a output voltage uvlo threshold v th ( uv ) v fb falling 0.2 0.25 0.3 v t on dut y t on v fb < 0 .25v 30 % drv output current i drv ( src ) sourcin g , v fb = 0 .48v 20 ma i drv ( sink ) sinkin g, v fb = 0 .52v 20 ma drv pin outp ut voltage v drv v fb = 0 .48v, v cc = 5 v, no loa d 4 .9 5.0 v pok threshold voltage for power ok v pok v fb rising 90% 93% 96% vfb pok threshold voltage for power not ok v pnok v fb falling 82% 85% 88% vfb pok lo w v o ltage pok sinks 1ma 50 100 mv pok delay time t delay 0.8 2 10 ms t hermal shutd o w n t e mperat ure t sd 150 c t hermal shutd o w n h y ster esis 50 c
LC1126 preliminar y linear int e grate d circuit unisonic technologi es co., ltd 5 of 6 w w w . uniso nic.co m.t w q w - r 1 0 2 - 0 5 0 . a ? functi on descri ptions po w e r-on -reset a po w e r-on-r e set (por) circuit monitors the vcc pi n voltag e (vcc) for po w e r- on-re set function to preven t w r o ng oper atio n. t he built-i n por circui t keeps the out put shutting off unti l in tern al circuit is operati ng pr operl y .. internal soft- start an interna l soft-start provides an intern al soft-start circuitry to control rise rate of the output vo ltag e an d limit the current surge d u ring start-up . t he ty p i cal soft -start interval is about 1ms. output voltag e regulation an error amplif ier w o rkin g w i th a temperatur e compens ate d 0.5v referen ce and an out p u t nmos regulates output to the pres et v o ltag e. t he error ampl ifier d e signe d w i t h hi gh b and w i dth and dc g a in p r ovides v e r y fa st transient respo n se an d l e ss loa d regu la tion. unde r-volta g e prote c t ion ( u vp) ut c l c 1126 monitors th e v o ltag e o n f b pin after soft-start pr ocess is finish ed. t herefore the uvp is dis abl in g durin g soft-start. w hen the voltage on f b pi n falls belo w t he und er-volta ge thresho l d, the uvp circuit shuts off the output imme di atel y . after a w h ile (~ 70 % dut y ), ut c l c 1126 starts a ne w soft-start to regulate o u tput. the rma l shut do w n a thermal shu t do w n circu i t limits the juncti on temperat ur e of u t c l c 112 6 . w hen the juncti on te mperatur e exc e e d s + 150 c, a therma l sensor tur n s o ff the output n m os, allo w i ng the dev ice to cool do w n . t he re gul ato r regul ates the output a gai n thro u gh in itiatio n of ne w soft- start cy c l e afte r the junctio n temperat ure co ols b y 50 c, resultin g in a p u lsed output d u ring c ont in uo us thermal ov e r load c ond ition s. ? ty pic a l a ppli c a t io n ci rcui t v cc =5v c3 0. 1 f u1 v cc 1 2 gnd 3 pok utc LC1126 dr v fb en 6 5 4 10 k 56p f q1 mo sfet n r1 43 k r2 39k c2 10 f 4.7f c1 v out =1.05 v v in =1.5v v out =0 .5 v* (1 + r1 r2 ) c4
LC1126 preliminar y linear int e grate d circuit unisonic technologi es co., ltd 6 of 6 w w w . uniso nic.co m.t w q w - r 1 0 2 - 0 5 0 . a ut c a s s u m e s n o r e s p o n s i b ilit y f o r e q u ip m e n t f a ilu r e s t h a t r e s u lt f r o m u s in g p r o d u cts a t v a lu e s th a t ex ce ed, ev e n m om en t ar i l y , r ate d v a l ue s (s uch as m a x i m um rati ngs , ope ra ti ng con di t i o n ra ng es , o r other parameters ) l i s ted i n pr odu cts s peci f i c a t i on s of a ny and all u t c p r od ucts d es c r i bed o r contai ne d her ei n. ut c p r od ucts a r e n ot de si gn ed f or us e i n l i f e s upp ort a p p l i ances , de v i ce s o r sy st em s w her e m a l f un cti o n o f thes e p r od ucts ca n b e rea son abl y ex pected to re su l t i n per so n a l i n j u r y . r epr od ucti o n i n w hol e o r i n par t is p r oh i b i t e d w i tho u t the p r i o r w r i tte n con sent o f the co pyr i ght ow n e r . t h e i n f o rm ati o n pre sen ted i n th i s do cum e n t d o e s no t f o r m pa rt of an y q uotati o n or con t ra ct, i s b e l i e v e d to b e a ccu rate and re l i a b l e a nd m a y be cha n g ed w i tho u t n o ti ce.


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